چاپ
CV
IAUN
Islamic Azad University, Najafabad Branch

 1- Personal Information  
First Name : Elham
Last Name : Yaghoubi
E-mail : e.yaghoubi@pco.iaun.ac.ir --- yaghoubi_elham@yahoo.com
Work Address : Islamic Azad University, Najafabad Branch, Esfahan
Academic Rank :Assistant Professor


 2- Education Background  
Academic Degree Education Field University Country Year
B.Sc computer engineering najafabad branch-IAU iran 2007
M.Sc computer engineering science and research branch-IAU iran 2011
Ph.D computer engineering science and research branch-IAU iran 2016


 3- Educational Experience  
Row Specialized Courses Taught Degree
1 سيگنال ها و سيستم ها کارشناسي
2 اصول و مباني رايانه و شبکه کارشناسي مهندسي پزشکي
3 شبکه هاي ميان ارتباطي کارشناسي ارشد
4 معماري پردازنده هاي شبکه کارشناسي ارشد
5 زبان توصيف سخت افزار کارشناسي ارشد
6 طراحي سيستم هاي تحمل پذير اشکال کارشناسي ارشد
7 سمينار کارشناسي ارشد
8 آزمون و آزمون پذيري کارشناسي ارشد
9 الکترونيک ديجيتال کارشناسي
10 طراحي کامپيوتري سيستم هاي ديجيتال کارشناسي
11 مدارهاي الکتريکي کارشناسي
12 پردازش موازي کارشناسي ارشد


 4- Research Interests  
Row Fields of Investigation and Specialized
1 optical circuit design
2 Network on Chip
3 Optical Network on Chip
4 Fault Tolerant systems
5 Mapping in NoC


 5- Research Activities    5-1) Paper Published in Journals  
Row Article title Journal Name Year Issue/Volume Article Printed Pages
1 NLR‑OP: a high‑performance optical router based on North‑Last turning model for multicore processors The Journal of Supercomputing 2022 78 2442–2476
2 FT-PDC: an enhanced hybrid congestion-aware fault-tolerant routing technique based on path diversity for 3D NoC The Journal of Supercomputing 2022 78 523–558
3 Non-Blocking and Multi Wavelength Optical Router Design based on Mach-zehnder Interferometer in 3-D Optical Network on Chip Majlesi Journal of Electrical Engineering 2021 15-2 73-81
4 Surix: Non-blocking and low insertion loss micro-ring resonator-based optical router for photonic network on chip The Journal of Supercomputing 2021 77-5 4438–4460
5 An enhanced cost-aware mapping algorithm based on improved shuffled frog leaping in network on chips The Journal of Supercomputing 2021 77 498–522
6 IAM: an improved mapping on a 2-D network on chip to reduce communication cost and energy consumption Photonic Network Communications 2021 41 78-92
7 ADFT: an adaptive, distributed, fault-tolerant routing algorithm for 3D mesh-based networks-on-chip International Journal of Internet Technology and Secured Transactions 2020 10-4 481 - 490
8 Non-Blocking Routers Design Based on West First Routing Algorithm Journal of Advances in Computer Research 2019 10-1 59-72
9 A Review of Optical Routers in Photonic Networks-on-Chip: A Literature Survey Journal of Advances in Computer Engineering and Technology 2018 4-3 143-154
10 Five-Port Optical Router Design Based on Mach–Zehnder Switches for Photonic Networks-on-Chip Journal of Advances in Computer Research 2016 7-3 47 - 53
11 Mach–Zehnder-based optical router design for photonic networks on chip Optical Engineering 2015 54-3 035102-1-7
12 Optical RNS adder and multiplier International Journal of Computer Applications in Technology 2015 52-1 71-76
13 All optical OR/AND/XOR gates based on nonlinear directional coupler Journal of Optics 2014 43-2 146 - 153
14 All-Optical Parity Circuits Using Nonlinear Directional Coupler International Journal of Modern Education and Computer Science 2013 5 68-76
15 Three-input majority function with nonlinear material in all-optical domain Journal of Optics 2013 42-4 349–354
16 A novel design for all-optical NAND/NOR/XOR gates based on nonlinear directional coupler Journal of Advances in Computer Research 2011 2-4 51-59
17 The Design of half-subtractor Logic Function Based on Nonlinear Directional Coupler Journal of Advance in Computer Research 2011 2-2 13-20
18 Providing a Routing Algorithm in Network on Chip to Reduce Energy Consumption and Increase Reliability with Fuzzy Neural Network and Genetic Programmi Journal of Novel Researches on Electrical Power 2021 10-2 43-51

 5-2) Papers Presented at the Conference  
Row Article title Conference Name Conference Location Year
1 Molecular study of NOT, AND, XOR, OR, full adder, half adder gates by using benzene rings The Second National Conference on Knowledge and Technology of Engineering Sciences of Iran Tehran 2018
2 A review of the performance of Topologies in Network on Chip The Second National Conference on Knowledge and Technology of Engineering Sciences of Iran Tehran 2018
3 study of 3D Network on Chip using fault tolerance routing algorithms The Second National Conference on Knowledge and Technology of Engineering Sciences of Iran Tehran 2018
4 study of fault tolerance routing algorithms in 3-D network on chip The Second National Conference on Knowledge and Technology of Engineering Sciences of Iran Tehran 2018
5 Fault tolerant routing algorithms in 3D network on chip : A survey 4th National Electrical Engineering Conference Islamic Azad University, Najafabad Branch 2018
6 A review of the design of optical photonic crystal based logic gates using a ring resonator 5th international conference on Information Technology, Computer Tbilisi 2018
7 3D Network on Chip Routing Protocols and Issues The Second National Conference on Electrical and Computer Engineering Tehran 2017
8 review of optical routers in network on chip First International Conference on Computer Science and Engineering Islamic Azad University - Najafabad Branch 2017
9 Review of All-Optical Reversible Gates and Their Application in Designing Optical Circuits First International Conference on Computer Science and Engineering Islamic Azad University - Najafabad Branch 2017
10 َA review of the design of the Ternary Logic gates First International Conference on Computer Science and Engineering Islamic Azad University - Najafabad 2017
11 The proposed new method for RNS Adder for a modulo set {2n-1,2n, 2n 1} The First National Conference on New Ideas in Computer Engineering Islamic Azad University - Shahrekord branch 2015

 5-3) Completed Research Plans  
Row Title Responsibility Project Kind

 5-4) Compilation and Books  
Row Title Compilation Kind Compilation Publishing Date Publisher

 5-5) Initiative, Innovation and Invention, and Valuable Asrbdy  
Row Title Registration Place Reference Confirmed Date

 5-6) Awards and Honors  
Row Institution Title Festival Date Reference Award Announcement

 5-7) Lecturer Of Workshop  
Row Title Date


 6- Executive Experience  
Row Title Executive Year
1 reviewer 2016
2 reviewer 2016
3 Faculty member 2016
4 Reviewer in Supercomputing Journal 2020